A general emulator for fractional-order memristive elements with multiple pinched points and application
In this paper, X-controlled universal fractional-order memelements (FOMEs) emulator is proposed. The emulation circuit is realized using second-generation current conveyor (CCII) and analog voltage multiplier (AVM)/divider block with two switches to control the type of memelements and emulator mode. The effect of the fractional-order capacitor (FOC) on the pinched hysteresis loop (HL) area and the range of frequency is discussed at different fractional-order α. Additionally, the higher-order meminductor, memristor, memcapacitor, and inverse memristor are discussed presenting multiple pinched
Fractional X-shape controllable multi-scroll attractor with parameter effect and FPGA automatic design tool software
This paper proposes a new fractional-order multi-scrolls chaotic system. More complex systems and flexible ranges of the chaotic behavior are obtained due to the extra parameters added by the fractional-order. The proposed system has novel complex chaotic behaviors. The effect of changing the system parameters on the system behavior is investigated and their bifurcation diagrams have been provided. The MLE for the proposed system in integer and fractional domain has been discussed. It shows that the proposed chaotic system is richer in the case of fractional-order. A novel FPGA design
Multifunction fractional inverse filter based on otra
This paper proposes a generalized topology of a fractional-order inverse filter (FOF) using operational transresistance amplifiers (OTRA) block. Seven different configurations are extracted from the introduced topology employing generalized admittances. The generalized admittances increase the flexibility to provide different types of FOFs such as inverse fractional high pass filter (FHPF), inverse fractional low pass filter (FLPF), inverse fractional bandpass filter (FBPF), and inverse fractional notch filter (FNF). Numerical and PSPICE simulation results are presented for selected cases to
On the Approximations of CFOA-Based Fractional-Order Inverse Filters
In this paper, three novel fractional-order CFOA-based inverse filters are introduced. The inverse low-pass, high-pass and band-pass responses are investigated using different approximation techniques. The studied approximations for the fractional-order Laplacian operator are the continued fraction expansion and Matsuda approximations. A comparison is held between the ideal filter characteristic and the realized ones from each approximation. A comparative study is summarized between the proposed circuits with some of the released inverse filters introduced in the literature. Foster-I
Emulation circuits of fractional-order memelements with multiple pinched points and their applications
This paper proposes voltage- and current-controlled universal memelements emulators. They are employed to realize the floating and grounded fractional-order memelements. The proposed emulators are implemented using different active blocks such as the second-generation current conveyor (CCII), Differential input double output transconductance amplifier (DOTA + ), balanced output CCII, and Differential voltage current conveyor (DVCC) with analog voltage multiplier. One of the main characteristics of the memristive elements is hysteresis loop behaviour with one pinched point, and the higher-order
Enhanced hardware implementation of a mixed-order nonlinear chaotic system and speech encryption application
This paper introduces a study for the effect of using different floating-point representations on the chaotic system's behaviour. Also, it offers a comparison between the attractors at three different orders, (integer, fractional, and mixed-order). This comparison shows the minimum number of bits needed for all parameters to simulate the chaotic attractor in each case. Numerical simulations using Matlab are presented for all discussed chaotic systems. This study opens the door to implement chaotic systems and different applications digitally with low hardware area. The FPGA hardware
Stability analysis of fractional-order Colpitts oscillators
The mathematical formulae of six topologies of fractional-order Colpitts oscillator are introduced in this paper. Half of these topologies are based on MOS transistor, and the other half is based on BJT transistor. The design procedure for all of these topologies is proposed and summarized for each one. Stability analysis is very crucial in oscillators’ design, as oscillators should have its poles on the imaginary axis to obtain a sustained oscillation. Hence, determining the factors that control the oscillator’s stability is very important. An intensive study of the stability of Colpitts
A universal floating fractional-order elements/memelements emulator
In this paper, a generalized floating emulator block is proposed using grounded elements. The proposed emulator is a universal emulator that is used to realize any floating elements such as fractional-order element (FOE) and fractional-order memelements (FOME). Different implementations for the introduced emulator are presented using different active blocks and generalized impedances. The fractional-order parameters add an extra degree of controllability on the hysteresis loop (HL) and the location of the pinched point, which will be investigated. Circuit simulations for the proposed circuits
Fractional-order edge detection masks for diabetic retinopathy diagnosis as a case study
Edge detection is one of the main steps in the image processing field, especially in bio-medical imaging, to diagnose a disease or trace its progress. The transfer of medical images makes them more susceptible to quality degradation due to any imposed noise. Hence, the protection of this data against noise is a persistent need. The efficiency of fractional-order filters to detect fine details and their high noise robustness, unlike the integer-order filters, it renders them an attractive solution for biomedical edge detection. In this work, two novel central fractional-order masks are proposed
A Digital Hardware Implementation for A new Mixed-Order Nonlinear 3-D Chaotic System
This paper introduces a generic modeling for a 3-D nonlinear chaotic based on fractional-order mathematical rules. Also, a novel modeling for the system using a mixture between integer and fractional-order calculus is proposed. Dynamics of the new realization are illustrated using phase portrait diagrams with complex behavior. Also, a great change in the parameter ranges is investigated using bifurcation diagrams. MATLAB and Xilinx ISE 14.5 are used in system simulations. Furthermore, the digital hardware implementation is done using Xilinx FPGA Virtex-5 kit. The synthesis report shows that
Pagination
- Previous page ‹‹
- Page 52
- Next page ››