This paper proposes FPGA realization of an IP core for generic fractional-order derivative based on Grünwald-Letnikov approximation. This generic design is applied to achieve reconfigurable realization of fractional-order chaotic systems. The fractional-order real-time configuration boosts the suitability of this particular realization for different applications, including dynamic switching, synchronization, and encryption. The proposed design targets optimized utilization of the FPGA internal resources and efficient employment of the external peripherals: switches and I/O ports in the FPGA

The spread of epidemics and diseases is known to exhibit chaotic dynamics; a fact confirmed by many developed mathematical models. However, to the best of our knowledge, no attempt to realize any of these chaotic models in analog or digital electronic form has been reported in the literature. In this work, we report on the efficient FPGA implementations of three different virus spreading models and one disease progress model. In particular, the Ebola, Influenza, and COVID-19 virus spreading models in addition to a Cancer disease progress model are first numerically analyzed for parameter

This paper introduces a generic modeling for a 3-D nonlinear chaotic based on fractional-order mathematical rules. Also, a novel modeling for the system using a mixture between integer and fractional-order calculus is proposed. Dynamics of the new realization are illustrated using phase portrait diagrams with complex behavior. Also, a great change in the parameter ranges is investigated using bifurcation diagrams. MATLAB and Xilinx ISE 14.5 are used in system simulations. Furthermore, the digital hardware implementation is done using Xilinx FPGA Virtex-5 kit. The synthesis report shows that

Edge detection is one of the main steps in the image processing field, especially in bio-medical imaging, to diagnose a disease or trace its progress. The transfer of medical images makes them more susceptible to quality degradation due to any imposed noise. Hence, the protection of this data against noise is a persistent need. The efficiency of fractional-order filters to detect fine details and their high noise robustness, unlike the integer-order filters, it renders them an attractive solution for biomedical edge detection. In this work, two novel central fractional-order masks are proposed

In this paper, a generalized floating emulator block is proposed using grounded elements. The proposed emulator is a universal emulator that is used to realize any floating elements such as fractional-order element (FOE) and fractional-order memelements (FOME). Different implementations for the introduced emulator are presented using different active blocks and generalized impedances. The fractional-order parameters add an extra degree of controllability on the hysteresis loop (HL) and the location of the pinched point, which will be investigated. Circuit simulations for the proposed circuits

The mathematical formulae of six topologies of fractional-order Colpitts oscillator are introduced in this paper. Half of these topologies are based on MOS transistor, and the other half is based on BJT transistor. The design procedure for all of these topologies is proposed and summarized for each one. Stability analysis is very crucial in oscillators’ design, as oscillators should have its poles on the imaginary axis to obtain a sustained oscillation. Hence, determining the factors that control the oscillator’s stability is very important. An intensive study of the stability of Colpitts

This paper introduces a study for the effect of using different floating-point representations on the chaotic system's behaviour. Also, it offers a comparison between the attractors at three different orders, (integer, fractional, and mixed-order). This comparison shows the minimum number of bits needed for all parameters to simulate the chaotic attractor in each case. Numerical simulations using Matlab are presented for all discussed chaotic systems. This study opens the door to implement chaotic systems and different applications digitally with low hardware area. The FPGA hardware

This paper proposes voltage- and current-controlled universal memelements emulators. They are employed to realize the floating and grounded fractional-order memelements. The proposed emulators are implemented using different active blocks such as the second-generation current conveyor (CCII), Differential input double output transconductance amplifier (DOTA + ), balanced output CCII, and Differential voltage current conveyor (DVCC) with analog voltage multiplier. One of the main characteristics of the memristive elements is hysteresis loop behaviour with one pinched point, and the higher-order

In this paper, three novel fractional-order CFOA-based inverse filters are introduced. The inverse low-pass, high-pass and band-pass responses are investigated using different approximation techniques. The studied approximations for the fractional-order Laplacian operator are the continued fraction expansion and Matsuda approximations. A comparison is held between the ideal filter characteristic and the realized ones from each approximation. A comparative study is summarized between the proposed circuits with some of the released inverse filters introduced in the literature. Foster-I

This paper proposes a generalized topology of a fractional-order inverse filter (FOF) using operational transresistance amplifiers (OTRA) block. Seven different configurations are extracted from the introduced topology employing generalized admittances. The generalized admittances increase the flexibility to provide different types of FOFs such as inverse fractional high pass filter (FHPF), inverse fractional low pass filter (FLPF), inverse fractional bandpass filter (FBPF), and inverse fractional notch filter (FNF). Numerical and PSPICE simulation results are presented for selected cases to