Convolutional Neural Networks (CNNs) for Artificial Intelligence (AI) algorithms have been widely used in many applications especially for image recognition. However, the growth in CNN-based image recognition applications raised challenge in executing millions of Multiply and Accumulate (MAC) operations in the state-of-The-Art CNNs. Therefore, GPUs, FPGAs, and ASICs are the feasible solutions for balancing processing speed and power consumption. In this paper, we propose an efficient hardware architecture for CNN that provides high speed, low power, and small area targeting ASIC implementation

In this paper, we present new approaches to study the co-existence of some types of synchronisation between hyperchaotic dynamical systems. The paper first analyses, based on stability theory of linear continuous-Time systems, the co-existence of the projective synchronisation (PS), the function projective synchronisation (FPS), the full state hybrid function projective synchronisation (FSHFPS) and the generalised synchronisation (GS) between general master and slave hyperchaotic systems. Successively, using Lyapunov stability theory, the coexistence of three different synchronisation types is

This paper presents a generalization of chaotic systems using two-dimensional affine transformations with six introduced parameters to achieve scaling, reflection, rotation, translation and/or shearing. Hence, the location of the strange attractor in space can be controlled without changing its chaotic dynamics. In addition, the embedded parameters enhance the randomness and sensitivity of the system and control its response. This approach overpasses performing the transformations as post-processing stages by applying them on the resulting time series. Trajectory control through dynamic

The discrete logistic map is one of the most famous discrete chaotic maps which has widely spread applications. This paper investigates a set of four generalized logistic maps where the conventional map is a special case. The proposed maps have extra degrees of freedom which provide different chaotic characteristics and increase the design flexibility required for many applications such as quantitative financial modeling. Based on the maximum chaotic range of the output, the proposed maps can be classified as positive logistic map, mostly positive logistic map, negative logistic map, and

This paper introduces a new encryption/decryption scheme based on a dynamic substitution box concept. Values of the proposed S-Box are different for each sample depending on the behavior of a memristor-based chaotic system. MATLAB simulations and FPGA implementation for the circuit are presented with throughput 4.266 Gbit/s. Also, FPGA realization for encryption/decryption scheme is proposed. Entropy, MSE, correlation coefficient tests are applied on two different input files to examine the efficiency of this cryptosystem. © 2018 IEEE.

We report on the design and structure principles of 5,5′-6,6′-tetrachloro-1,1′-dioctyl-3,3′-bis-(3-carboxypropyl)-benzimidacarbocyanine (Dye 1). Such metal-free amphiphilic cyanine dyes have many applications in dye-sensitized solar cells. AFM surface topographic investigation of amphiphilic molecules of Dye 1 adsorbed on TiO2 anode reveals the ability of spontaneous self-organization into highly ordered aggregates of fiber-like structure. These aggregates are known to exhibit outstanding optical properties of J-aggregates, namely, efficient exciton coupling and fast exciton energy migration

This paper presents a comparative study of edge detection algorithms based on integer and fractional order differentiation. A performance comparison of the two algorithms has been proposed. Then, a soft computing technique has been applied to both algorithms for better edge detection. From the simulations, it shows that better performance is obtained compared to the classical approach. The noise performances of those algorithms are analyzed upon the addition of random Gaussian noise, as well as the addition of salt and pepper noise. The performance has been compared to peak signal to noise

Arithmetic Logic Unit (ALU) is the most important component of processors. All arithmetic and logical computations are performed inside the ALU. This paper presents the design and the implementation of the ALU. The design is based on Approximated Precision Shader and Look-Up Table (LUT) multiplier. The lookup table, Wallace tree, and Carry Look-ahead Adder (CLA) are used in combination to speed up the multiplier operation. The proposed ALU is designed using Verilog and verified using Xilinx Virtex-5 XC5VLX30 FPGA. © 2016 IEEE.

The paper aims to propose three different inverse memristor emulators based on serveral active blocks. One of the presented emulator realizes employing second generation current conveyor (CCII) andcanalog voltage multiplier with passive elements. The other two introduced emulators are designed using cureent feedback operational amplifier (CFOA) with two switches or two BJT transistor. One of the proposed emulators has the advantages that it switches between the inverse and memristor at the same time but in different frequency with less number of components. The introduced circuitry are

The microcrystal structure of copper sulfide (CuS) nano-structured ultra-thin film was prepared on glass substrate from aqueous ammonia solution and sodium hydroxide at 60 °C using a simple and cost-effective chemical bath deposition (CBD). The powder X-ray diffraction method was used to characterize the hexagonal structure of the prepared CuS thin-film. While, surface morphology and surface topology were investigated by scanning electron microscopy (SEM) and atomic force microscopy (AFM). The optical properties were investigated by using UV–visible absorption spectrum. The electronic